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Infineon Technologies CY7C025-15AXI — Memory (DRAM / SRAM / Flash / EEPROM)

Cypress CY7C025-15AXI Dual-Port SRAM, 128Kbit, 15 ns

MPNCY7C025-15AXI
Obsolete

Cypress CY7C025-15AXI, SRAM - Dual Port, Asynchronous, 128Kbit (8K x 16), 15 ns access, 4.5V~5.5V, -40°C~85°C, 100-TQFP (14x14), Tray.

Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C025-15AXI specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Supply voltage4.5V ~ 5.5V
Memory interfaceParallel
Operating temperature-40°C ~ 85°C (TA)
PackageTray
TechnologySRAM - Dual Port, Asynchronous
Access time15 ns
Memory size128Kbit
Memory formatSRAM
Case100-LQFP
Memory organization8K x 16
Write cycle time - word, page15ns

Product details

The Cypress CY7C025-15AXI is a 128Kbit dual-port asynchronous SRAM organized as 8K x 16 bits. It gives two independent bus masters simultaneous read/write access to the same memory.

In a shared-memory design, that number eats directly into the setup-and-hold budget of the receiving controller.

No last-time-buy window remains open from the manufacturer. The only channel for this part is the independent surplus and broker market.

Dual-port architecture — no arbitration logic needed

Frequently asked questions

What is the replacement for CY7C025-15AXI?

There is no single official replacement part number from Cypress, but faster speed grades in the same CY7C025 family (such as the -12 or -10 ns variants) are pin-compatible drop-in replacements in the same 100-TQFP package. They recover bus margin without a board layout change.

What are the specs of CY7C025-15AXI?

It is a 128Kbit dual-port asynchronous SRAM organized as 8K x 16 bits, with a 15 ns access time, 4.5V to 5.5V supply, and an industrial temperature range of -40°C to 85°C. It comes in a 100-TQFP (14x14 mm) package.

Can CY7C025-15AXI be replaced by a faster SRAM?

Yes, a faster speed grade in the same CY7C025 family (e.g., 12 ns or 10 ns) is a pin-compatible drop-in. The 100-TQFP footprint is identical, so no board layout change is needed. The faster part recovers bus timing margin for higher-clock-rate systems.