72 Kbit dual-port SRAM — 15 ns asynchronous access
The CY7C0241-15AXI is a 72 Kbit dual-port asynchronous SRAM organized as 4K words by 18 bits. The 15 ns access time sets the bus turnaround window.
What the 15 ns access time means for the bus
The 15 ns access time and write cycle time match, so back-to-back writes from one port do not stretch the cycle.
