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Infineon Technologies CY7C0241-15AXI — Memory (DRAM / SRAM / Flash / EEPROM)

Infineon CY7C0241-15AXI 72Kbit Dual-Port SRAM, 15 ns

MPNCY7C0241-15AXI
Obsolete

Infineon CY7C0241-15AXI, 72Kbit Dual-Port Asynchronous SRAM, 4K x 18 organization, 15 ns access time, Parallel interface, 4.5V to 5.5V supply, -40°C to 85°C, 100-TQFP (14x14), Tray.

Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C0241-15AXI specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Supply voltage4.5V ~ 5.5V
Memory interfaceParallel
Operating temperature-40°C ~ 85°C (TA)
PackageTray
TechnologySRAM - Dual Port, Asynchronous
Access time15 ns
Memory size72Kbit
Memory formatSRAM
Case100-LQFP
Memory organization4K x 18
Write cycle time - word, page15ns

Product details

72 Kbit dual-port SRAM — 15 ns asynchronous access

The CY7C0241-15AXI is a 72 Kbit dual-port asynchronous SRAM organized as 4K words by 18 bits. The 15 ns access time sets the bus turnaround window.

What the 15 ns access time means for the bus

The 15 ns access time and write cycle time match, so back-to-back writes from one port do not stretch the cycle.

Frequently asked questions

What is the closest pin-compatible alternative to CY7C0241-15AXI?

No official pin-compatible second source or direct Infineon replacement is listed in the available documentation. The CY7C0241 family shares the same footprint across speed grades (15 ns, 12 ns), but all variants are obsolete. For a new design, a current-generation dual-port SRAM from a different family would require a board layout change.

What is the memory organization of CY7C0241-15AXI?

The memory is organized as 4K words by 18 bits, giving a total of 72 Kbit. The 18-bit word width accommodates a 16-bit data bus with two parity bits or an 18-bit DSP word.