Dual-port SRAM for shared-memory architectures
The Cypress CY7C019V-15AXC is a 1.152 Mbit dual-port asynchronous SRAM organized as 128K x 9 bits. It provides two independent ports with separate address, data, and control lines.
In a dual-port design, both ports share the same array, so arbitration logic (built into the chip) resolves simultaneous access to the same address. The 15 ns window sets the minimum cycle time for back-to-back reads or writes.
The CY7C019V-15AXC is marked obsolete by Cypress (now Infineon). This means the part is no longer manufactured and cannot be ordered through authorized distributors.