Infineon CY7C007A-20JC, 256Kbit dual-port asynchronous SRAM, 32K x 8, 20 ns access time, parallel interface, 4.5V-5.5V supply, 68-PLCC (24.23x24.23 mm), 0°C to 70°C, Tube.
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting | Surface Mount |
| Supply voltage | 4.5V ~ 5.5V |
| Memory interface | Parallel |
| Operating temperature | 0°C~70°C(TA) |
| Package | Tube |
| Technology | SRAM - Dual Port, Asynchronous |
| Access time | 20 ns |
| Memory size | 256Kbit |
| Memory format | SRAM |
| Case | 68-LCC (J-Lead) |
| Memory organization | 32K x 8 |
| Write cycle time - word, page | 20ns |
The Infineon CY7C007A-20JC is a 256Kbit dual-port asynchronous SRAM organized as 32K x 8. Its 20 ns access time lets two independent bus masters read or write the same memory array.
Access time is 20 ns. Write cycle time matches read access at 20 ns.
The CY7C007A-20JC is obsolete per the manufacturer. No direct pin-compatible replacement is listed.
256Kbit dual-port asynchronous SRAM organized as 32K x 8, 20 ns access time, parallel interface, 4.5V to 5.5V supply, 68-PLCC package, 0°C to 70°C operating temperature.
The pinout is defined for the 68-PLCC package. Refer to the manufacturer's datasheet for the full pin assignment and function table.
The CY7C007A-20JC has a 20 ns access time versus the 15 ns of the -15JC variant. If your timing budget can tolerate the slower access, the parts are otherwise functionally identical in the same 68-PLCC package. Verify setup/hold margins before substituting.