55 ns access time — timing budget for the bus
At 55 ns, this part fits a memory controller with a 55 ns or longer read cycle.
Listed as Active on the lifecycle record. No NRND or LTB flags. The part is RoHS non-compliant per the ledger.
CY62128DV30L-55ZRI MoBL SRAM, 1Mbit, 55 ns, 2.2V-3.6V
MPNCY62128DV30L-55ZRI
End of Life
Infineon (Cypress) MoBL® CY62128DV30L-55ZRI, 1Mbit asynchronous SRAM, 128K x 8 organization, 55 ns access time, 2.2V to 3.6V supply, parallel interface, -40°C to 85°C, 32-RTSOP surface-mount package.
$1.9Ref. price · indicative, final on quote
Packaging32-TFSOP (0.724", 18.40mm Width)
RoHSRoHS non-compliant
SeriesMoBL®
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026
Specifications
| Parameter | Value |
|---|---|
| Series | MoBL® |
| Memory type | Volatile |
| Mounting | Surface Mount |
| Supply voltage | 2.2V ~ 3.6V |
| Memory interface | Parallel |
| Operating temperature | -40°C ~ 85°C (TA) |
| Package | Bulk |
| Technology | SRAM - Asynchronous |
| Access time | 55 ns |
| Memory size | 1Mbit |
| Memory format | SRAM |
| Case | 32-TFSOP (0.724\", 18.40mm Width) |
| Memory organization | 128K x 8 |
| Write cycle time - word, page | 55ns |
Product details
Frequently asked questions
Is CY62128DV30L-55ZRI obsolete or end-of-life?
No. The lifecycle record shows this part as Active. There is no NRND or last-time-buy notice on file. It remains a valid BOM line for new production.
What is the access time and voltage range of CY62128DV30L-55ZRI?
Access time is 55 ns for both read and write cycles. Supply voltage range is 2.2V to 3.6V.