NVSRAM that holds data without a battery
The Cypress CY14B104NA-ZS45XI is a 4 Mbit non-volatile SRAM organized as 256K x 16 bits. It combines a full-speed SRAM core with a non-volatile element, so data written to the array is retained when power is removed — no battery, no supercap, no EEPROM wear-out. The parallel interface and 45 ns access time let it drop into a standard asynchronous SRAM socket while adding non-volatility for configuration parameters, calibration constants, or event logs.
45 ns access — timing margin for the bus
The 45 ns access time and 45 ns write cycle time match the read-cycle timing of many mid-range MCUs and FPGAs.
Cypress lists this part as Active. No NRND or last-time-buy notices are on record.