±50 ppm stability and what it costs in timing budget
The ECS-2033-120-BN: For a UART clocking a 115200 baud link, that drift sits comfortably inside the ±2 % baud-rate tolerance most UARTs spec. For a USB PHY reference, the tolerance is tighter than USB Full-Speed allows on its own — the oscillator would need a PLL or spread-spectrum clock to meet USB spec, since USB requires ±500 ppm at the host.
Current draw — active and disabled
Maximum supply current is 7 mA when the oscillator is running, and drops to 10 µA when disabled — so shutting down the reference eliminates essentially all the quiescent draw. For a battery-powered node that wakes periodically and needs a clean clock during activity, the enable/disable pin is the primary power-control lever; the 10 µA disabled current is low enough to leave the oscillator permanently in the disabled state between wake cycles rather than removing the supply rail entirely.
2.50 × 2.00 mm ultra-thin package
The 4-SMD no-lead package seats at 0.90 mm max height — the thin profile suits portable or handheld hardware where vertical clearance is constrained. No-lead construction means the GND pads sit flush to the board, which helps thermal dissipation to the pad plane but requires a reflow profile with a flat soak to avoid tombstoning on the small pad geometry. Tape-and-reel and cut-tape packaging options are both listed, so the part handles both high-volume SMT assembly and low-quantity prototype reel.