JFET input stage and parametric profile
The OP15GS-REEL is a single JFET-input operational amplifier in an 8-SOIC package. The JFET front end delivers 60 pA typical input bias current — two orders of magnitude lower than a bipolar op-amp — so it preserves signal integrity in high-impedance sensor interfaces, photodiode amplifiers, and precision integrators where bias current error would dominate the DC budget. Gain-bandwidth product is 5.4 MHz with a slew rate of 9V/µs. For a 1 V peak-to-peast output swing, the large-signal bandwidth is about 1.4 MHz before slew limiting sets in — the 9V/µs figure governs the maximum output frequency at full amplitude, not the small-signal GBW. Input offset voltage is 500 µV typical, which sets the DC accuracy floor for a gain-of-10 stage at 5 mV referred to output.
Runs from a single 36 V supply or split ±18 V rails — the 36 V span is the total across V+ and V-. Quiescent current is 2.8 mA, moderate for a JFET op-amp; the thermal rise in the 8-SOIC package at 25°C ambient is negligible even with both rails at the maximum.