6000Vrms isolation in a 10-channel SPI isolator
It handles SPI clock, data, and chip-select lines with a data rate up to 100Mbps, making it a fit for high-speed sensor interfaces, isolated ADC links, and motor-drive feedback paths where reinforced insulation is required. The 50kV/µs common-mode transient immunity keeps data intact when fast-switching power stages slam the barrier with noise — a spec that matters more than the headline isolation voltage in inverter and servo-drive applications.
Supply range and channel configuration
The supply range spans 3V to 5.5V on both sides, so it runs from a single 3.3V or 5V rail without a level translator. There are 7 inputs on side 1 and 6 on side 2, with a mix of bidirectional and unidirectional channels to handle the SPI bus handshake. Propagation delay is 150ns max in either direction, which sets the timing budget for the SPI clock period — at 100Mbps the 10ns rise/fall times eat into the bit time, so keep the trace lengths short and the bus loading light.
Housed in a 36-BGA (15x6.25mm) package, this is a surface-mount part that needs a reflow profile, not a socket swap in the field. No isolated power is integrated, meaning the secondary side needs its own isolated supply rail or an external DC/DC module.