Clock generator with PLL and 1:10 fanout — what it covers
It accepts a single crystal input and delivers up to ten clock outputs in CMOS, LVDS, or LVPECL logic levels. The maximum output frequency is 156.25 MHz, making it a fit for mid-speed SERDES reference clocks, Ethernet PHY timing, or ADC/DAC sample clocks in communications and instrumentation equipment. The part operates from a 2.97 V to 3.63 V supply and is rated over the industrial temperature range of -40°C to 85°C.
Package and mounting — 40-LFCSP with exposed pad
Surface-mount only.
ADI lists the AD9571ACPZLVD as Active with ROHS3 compliance.