Peak pulse clamping at 13.4 V
The 1.5SMC9.1CAHM3/H: The 13.4 V maximum clamping voltage at the 112 A peak pulse rating (10/1000 µs waveform) defines the stress the downstream semiconductor sees during an transient event — the clamping voltage, not the standoff, is the clamping-side ceiling the circuit designer must budget against. Reverse standoff sits at 7.78 V typ, establishing the continuous working voltage the TVS presents to the protected rail in normal operation; the 8.65 V minimum breakdown voltage guarantees the device stays in its high-impedance state below that threshold.
AEC-Q101 qualification and thermal margin
AEC-Q101 automotive qualification means the part passed the discrete semiconductor stress sequence: humidity, temperature cycling, mechanical shock, and vibration — relevant for telecom outdoor equipment as well, since the qualification set overlaps with industrial environmental demands.