Single 2-input AND gate on a 2.3V–3.6V rail
The Toshiba 7UL1T08FU,LF is a single 2-input AND gate from the 7UL series, a low-power logic family aimed at battery-operated and portable gear. With a max quiescent current of 1 µA, the gate adds negligible draw to a sleeping microcontroller or sensor node. The 8mA output drive is enough to feed one or two standard CMOS loads but not a long bus — plan a buffer if the trace runs past 10 cm at 3.3V.
The 4.4 ns max propagation delay at 3.3V and 15 pF load sets the timing floor for a combinatorial path. At 100 MHz the clock period is 10 ns — this gate eats nearly half the cycle, so it fits best in slower control logic or as a gating element ahead of a flip-flop, not in a high-speed data pipeline. The input logic thresholds are specified as 0.1V–0.4V for low and 2.2V–2.48V for high at 3.3V supply. That 0.4V low threshold means a 1.8V-logic output driving this gate may not reach a valid low — level-shift or use the 0.9V-supply sibling 7UL1G08FU,LF if the upstream rail is below 2.3V.
Package options and board-fit
The supplier device package is listed as 5-SSOP, which is the same mechanical outline under Toshiba's internal code. One copper pour on the PCB handles the single VCC and GND pins; no thermal pad is needed. CT suits prototype or low-volume builds without committing to a full reel.