Package and board integration
The TXU0104RUTR comes in a 12-UFQFN package (1.7x2 mm body) with a 0.50 mm pitch — the small footprint demands a controlled-impedance stack-up for the 200 Mbps signals, especially the traces between the VCCA and VCCB supply pins which should each have a 0.1 µF decoupling cap within 2 mm of the package edge.
Voltage translation range and signal compatibility
Both VCCA and VCCB accept 1.08 V to 5.5 V, so this single part bridges 1.2 V, 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without external dividers — a common scenario when an FPGA core at 1.2 V talks to a 5 V legacy sensor interface. The unidirectional channel architecture means signal direction is fixed per channel; the four channels all translate the same direction (A-side to B-side or vice versa depending on the pin assignment), so a bidirectional bus like I²C needs a different part.
Data rate and output drive
Rated for 200 Mbps, the TXU0104RUTR handles SPI at 50 MHz, UART at 921.6 kbaud, and parallel memory buses with ease — the tri-state output lets multiple translators share a common data line without contention, useful in multi-drop configurations.
Lifecycle and sourcing
Sourced through authorized and independent distribution; availability and current pricing confirmed at RFQ against your BOM quantity.