200 mA LDO with 300 nA quiescent current
The TPS7A0313PDBVR: The 300 nA quiescent current keeps the regulator's own draw negligible in always-on or battery-backed memory rails — the LDO's consumption sits below the self-discharge rate of a typical coin cell backup. PSRR is 55 dB at 1 kHz — this attenuates switching noise from a preceding DC-DC converter by roughly 560×, cleaning the supply for analog front-ends or sensor bias. The 0.7 V max dropout at full load means a 2.0 V input rail leaves 70 mV of headroom for regulation.
Housed in a 5-pin SOT-23-5 (SC-74A) package, the TPS7A0313PDBVR occupies roughly 3×3 mm of board area. The surface-mount footprint and 0.95 mm pin pitch fan out easily on a two-layer board — no via-in-pad or buried trace needed for the input, output, and enable pins. The Enable pin allows the downstream load to be sequenced on and off without a separate load switch. When disabled, the output goes high-impedance and the quiescent current drops further — useful for power-gating memory or sensor rails in a duty-cycled system.
Temperature grade and protection envelope
The protection suite includes over-current, over-temperature, and under-voltage lockout (UVLO) — UVLO holds the output off until the input rail is above the POR threshold, preventing brown-out glitches on the load. Sourced through authorized and independent distribution; lead time and pricing confirmed at RFQ.