AEC-Q100 reset supervisor for 3.3 V rails
The TPS3851G33EQDRBRQ1: It asserts an active-low, open-drain reset output when the monitored voltage drops below the threshold, and holds reset for a minimum of 170 ms after the supply returns to tolerance.
170 ms reset timeout — why it matters for system sequencing
The minimum 170 ms reset timeout gives the main supply and clock oscillator time to stabilise before the processor or SoC exits reset. In a multi-rail system, this window allows downstream regulators to reach regulation before the core boots, preventing brown-out or undefined start-up states.