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Texas Instruments TPS3837E18DBVT — Power Management (PMIC / Gate Driver)

TPS3837E18DBVT Simple Reset/Power-On Reset, 1.71V Threshold

MPNTPS3837E18DBVT
End of Life

Texas Instruments TPS3837E18DBVT, Simple Reset/Power-On Reset, Active High, Push-Pull Output, 1.71V Threshold, 10ms Timeout, SOT-23-5, -40°C to 85°C.

$2.4300Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

TPS3837E18DBVT specifications
ParameterValue
TypeSimple Reset/Power-On Reset
MountingSurface Mount
Voltage - threshold1.71V
Number of voltages monitored1
Operating temperature-40°C ~ 85°C (TA)
ResetActive High
OutputPush-Pull, Totem Pole
PackageTape & Reel (TR) Cut Tape (CT)
ManufacturerTexas Instruments
Reset timeout10ms Minimum
CaseSC-74A, SOT-753

Product details

1.71V threshold — the supply rail it watches

The TPS3837E18DBVT: This threshold is set internally for 1.8V nominal supply rails — common for core logic, DDR memory termination, or low-voltage I/O banks. The active-high, push-pull output drives the processor reset input directly without needing an external pull-up resistor.

The part comes in a SOT-23-5 package, a five-pin surface-mount footprint. The supplier device package string SOT-23-5 is what the PCB footprint library uses.

The base product number TPS3837 covers multiple threshold options; the suffix selects the 1.71V version, so ordering the correct variant is a matter of verifying the full order code against the BOM.

Frequently asked questions

What is the exact reset threshold voltage of TPS3837E18DBVT?

The reset threshold voltage is 1.71V. This is the trip point for a nominal 1.8V supply rail — the reset asserts when the monitored voltage falls below 1.71V and de-asserts after a 10ms timeout once the supply recovers above it.

Does TPS3837E18DBVT have an active high or active low reset?

The reset output is active high. The output goes high when the monitored voltage drops below the threshold and stays high through the timeout period after recovery. This is the correct polarity for processors that require a high-true reset input.