4.55V threshold supervisor for 5V rails
When the supply drops below that threshold, the active-low open-drain output asserts reset and holds it for a minimum of 120ms after the supply recovers — long enough for the downstream processor or FPGA to complete its power-up sequence. The open-drain output lets you wire-OR the reset signal with other supervisors or a manual reset button, pulling to whatever logic voltage the pull-up resistor connects to.
Industrial temperature and SOT-23-5 footprint
Open-drain output — pull-up resistor required
Because the output is open drain, the reset signal floats unless a pull-up resistor connects it to the logic supply rail. The 120ms timeout is a minimum; the actual timeout can be longer depending on the internal oscillator tolerance and temperature, so budget margin in any timing-critical power-up sequence.