1.67V threshold supervisor for 1.8V rails
The TPS3808G18DBVT: The active-low, open-drain output pulls low when the monitored voltage dips below threshold, and releases after a user-adjustable reset timeout. This is a simple power-on reset part, not a sequencing or window-detection device: it asserts reset on power-up and de-asserts once the rail is stable and the timeout expires. The 1.67V threshold sits roughly 7% below a nominal 1.8V rail, giving enough headroom to catch a sag before the downstream logic (FPGA core, DDR VTT, or MCU I/O supply) enters an undefined state. The adjustable timeout means you set the reset-hold period with a single capacitor — no fixed-delay part number to hunt down.
Open-drain output and wired-OR flexibility
The open-drain output lets multiple supervisor outputs share a common pull-up resistor — useful when several rails must jointly gate a system enable. Because the output is not driven high, the pull-up voltage can be higher or lower than the monitored rail, as long as it stays within the absolute maximum of the output transistor. The reset timeout is adjustable/selectable, which means a single BOM line covers multiple reset-hold durations by swapping one capacitor value. No need to qualify a different order code for each delay. Operating temperature spans -40°C to 125°C (junction), so this supervisor fits into engine-bay electronics, industrial motor drives, or outdoor telecom equipment where the ambient sees wide swings. The SOT-23-6 package keeps the footprint small — about 2.9 mm × 1.6 mm — which matters when board space is tight next to a processor or FPGA.
