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Texas Instruments TPS3125J18DBVR — Power Management (PMIC / Gate Driver)

TPS3125J18DBVR Simple Reset/Power-On Reset, 1.62V Threshold

MPNTPS3125J18DBVR
Active

Texas Instruments TPS3125J18DBVR Simple Reset/Power-On Reset, Active High/Active Low, Push-Pull, Totem Pole output, 1.62V threshold, 100ms timeout, -40°C~85°C, SOT-23-5.

$2.3100Ref. price · indicative, final on quote
Texas Instruments TPS3125J18DBVR datasheet (PDF)
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

TPS3125J18DBVR specifications
ParameterValue
TypeSimple Reset/Power-On Reset
MountingSurface Mount
Voltage - threshold1.62V
Number of voltages monitored1
Operating temperature-40°C~85°C(TA)
ResetActive High/Active Low
OutputPush-Pull, Totem Pole
PackageTape & Reel (TR); Cut Tape (CT)
Reset timeout100ms Minimum
CaseSC-74A, SOT-753

Product details

1.62V threshold supervisor for 1.8V logic rails

The 100ms minimum reset timeout ensures the downstream processor or FPGA sees a stable supply before the reset is released, covering the power-up settling period for most low-voltage cores.

Housed in a SC-74A (SOT-753) package, the part mounts as a standard SOT-23-5 footprint — a common, low-inductance package for board-level voltage monitoring. The small body saves board area on dense mixed-signal PCBs.

This removes the supply-chain risk of a forced redesign mid-production.

Frequently asked questions

What reset output types does this part provide?

It provides both Active High and Active Low reset signals from a push-pull, totem-pole output stage. This means you get complementary reset outputs without needing external components like pull-up resistors.

How does the TPS3125J18DBVR compare to the TPS3125J12DBVR?

The TPS3125J18DBVR monitors a 1.62V threshold, while the TPS3125J12DBVR monitors a 1.20V threshold. Both are from the same TPS3125 family with identical package, temperature range, and reset timeout. The choice depends on the supply rail being supervised — 1.8V vs 1.2V core logic.