Rail-to-rail steering array for Ethernet PHY interfaces
Each channel shunts the surge to the supply rail or ground, keeping the signal voltage within the PHY's safe operating area. With a reverse standoff voltage of 5.5 V (max), it sits just above a typical 3.3 V or 2.5 V I/O rail — the clamping threshold is low enough to prevent the PHY from seeing damaging spikes but high enough to avoid false triggering during normal signalling.
Package and footprint — 6-UFDFN (1.45 × 1.0 mm)
Housed in a 6-UFDFN package (supplier device package 6-SON, 1.45 × 1.0 mm), this is a tiny land-grid array with a 0.50 mm pitch. The small footprint places the protection diodes directly at the connector or PHY side — critical for keeping the trace inductance low and the clamping response fast. No special layout beyond standard ESD placement rules — route the protected lines through the device before the PHY.