It packs 256 KB of Flash, 32 KB of SRAM, and 2 KB of EEPROM on-chip — the EEPROM block saves an external serial EEPROM for calibration constants or boot parameters.
The 80 MHz core with hardware FPU handles control loops with headroom for stack and communications. The 12-channel 12-bit ADC can sample three phase currents simultaneously.
Memory map and field-reprogramming
256 KB of Flash (256K x 8) supports a bootloader plus application image; the 32 KB SRAM (32K x 8) supports a real-time OS with buffers for CAN message queues.
No last-time-buy or EOL notice is in effect.
