
TI TM4C1237E6PMI7R, ARM Cortex-M4F MCU, 80MHz, 128KB Flash, 64-LQFP
Texas Instruments TM4C1237E6PMI7R, Tiva C Series ARM Cortex-M4F microcontroller, 80MHz clock, 128KB Flash, 32KB RAM, 43 I/O, CANbus, USB OTG, 12-channel 12-bit ADC, 64-LQFP, -40°C to 85°C, 1.08V to 3.63V supply, tape and reel.
Specifications
| Parameter | Value |
|---|---|
| Series | Tiva™ C |
| Mounting | Surface Mount |
| Oscillator type | Internal |
| Program memory type | FLASH |
| Voltage - supply (Vcc (Vdd)) | 1.08V ~ 3.63V |
| Operating temperature | -40°C~85°C(TA) |
| Speed | 80MHz |
| Package | Tape & Reel (TR) |
| RAM size | 32K x 8 |
| Core size | 32-Bit Single-Core |
| EEPROM size | 2K x 8 |
| Peripherals | Brown-out Detect/Reset, DMA, POR, WDT |
| Connectivity | CANbus, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG |
| Number of i (O) | 43 |
| Core processor | ARM® Cortex®-M4F |
| Case | 64-LQFP |
| Data converters | A/D 12x12b |
| Program memory size | 128KB (128K x 8) |
Frequently asked questions
Where can I buy the TM4C1237E6PMI7R and what are current lead times?
The TM4C1237E6PMI7R is sourced to order against an RFQ through independent distribution channels. Availability and current pricing are confirmed at quote time — because the part is EOL-hot, residual distributor inventory and lead times are variable and should be verified against the specific RFQ before committing a BOM line.
What is the TM4C1237E6PMI7R's listed speed and memory complement?
The TM4C1237E6PMI7R runs at 80MHz on an ARM Cortex-M4F core with 128KB of Flash program memory and 32KB of SRAM, sourced directly from the product record.
Does TI provide a pin-compatible second source for the TM4C1237E6PMI7R?
The TM4C1237E6PMI7R is the 128KB Flash / 32KB RAM mid-density member of the TM4C1237 base product line; TI has not published an official cross-reference or pin-compatible second source in the available record for this specific order code. Designs requiring supply resilience should confirm whether a higher-density or lower-density variant within the same LQFP pinout is an acceptable migration, but any such substitution is a design decision, not an authorized alternate.