The FPU accelerates control-loop math and sensor fusion without a software emulation penalty — a real advantage over M3 or M0+ parts in the same price tier. Program memory is 128 KB of Flash, backed by 32 KB of SRAM and a separate 2 KB EEPROM block for calibration constants or configuration data that survives reprogramming.
On-chip connectivity includes a CAN 2.0B controller, multiple I²C, SPI/SSI, and UART/USART interfaces, plus IrDA and Microwire support. The 12-channel, 12-bit ADC captures analog sensor data directly, eliminating an external converter for most multi-sensor nodes.
Supply range and clocking
The core and I/O operate from a single supply between 1.08 V and 3.63 V, which covers both 3.3 V and 1.8 V rail designs. An internal oscillator is provided, so the MCU can run without an external crystal for cost-sensitive builds; the PLL multiplies the internal or external reference up to the 80 MHz core clock.
