The TM4C1230D5PMI7R: ARM Cortex-M4F FPU at 80 MHz handles PID loops and sensor fusion without software emulation. 64 KB Flash and 24 KB RAM suit a CAN gateway or motor-control node. 2 KB EEPROM stores calibration constants on-chip.
Twelve 12-bit ADC channels handle analog feedback from sensors or potentiometers.
64-LQFP — footprint and routing notes
The 49 I/O lines give enough headroom for a parallel LCD data bus, a bank of opto-isolated inputs, and the serial interfaces simultaneously.
For a BOM planner, this removes the urgency to stockpile or qualify a drop-in replacement. The TM4C1230 base number covers a range of Flash and RAM options in the same 64-LQFP footprint, so a density upgrade (e.g., to the 256 KB variant) is a pin-compatible move if firmware grows.