Skip to main content
Texas Instruments TLV71333PDQNR — Power Management (PMIC / Gate Driver)

TLV71333PDQNR LDO, 3.3V Fixed, 150mA, 4-X2SON

MPNTLV71333PDQNR
End of Life

Texas Instruments TLV71333PDQNR, linear voltage regulator, fixed 3.3V output, 150mA, positive, 4-XDFN Exposed Pad, surface mount.

$0.45Ref. price · indicative, final on quote
Packaging4-XDFN Exposed Pad
RoHSROHS3 Compliant
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

TLV71333PDQNR specifications
ParameterValue
Output typeFixed
MountingSurface Mount
Voltage - input5.5V
Voltage dropout0.54V @ 150mA
Voltage - output (Min (Fixed))3.3V
Output current150mA
Current - quiescent75 µA
Operating temperature-40°C ~ 125°C (TJ)
PSRR70dB ~ 55dB (100Hz ~ 1MHz)
PackageTape & Reel (TR); Cut Tape (CT)
Case4-XDFN Exposed Pad
Control featuresEnable
Protection featuresOver Current, Over Temperature, Reverse Polarity, Short Circuit, Under Voltage Lockout (UVLO)
Number of regulators1
Output configurationPositive

Product details

Package and board-fit — 4-X2SON with exposed pad

The TLV71333PDQNR is a 150 mA fixed-output LDO in a 4-X2SON package measuring 1x1 mm (supplier device package 4-X2SON). The exposed pad underneath is the primary thermal path — the board layout must connect it to a copper pour or via array to keep junction temperature within the -40 to 125 °C operating range. This is a single-output positive regulator with a fixed 3.3 V output. The enable pin lets you gate the output for sequenced power rails or low-power sleep modes — pulling it low drops the quiescent current from the 75 µA typical figure to near zero.

PSRR across frequency — where it matters for noise-sensitive rails

PSRR is specified at 70 dB at 100 Hz, rolling off to 55 dB at 1 MHz. That 55 dB floor at 1 MHz is the figure that matters for a rail feeding an RF or high-speed ADC front-end — switching regulator ripple at that frequency is attenuated by roughly 560x, not the 3000x the 70 dB figure suggests. If your load draws switching noise above 1 MHz, the attenuation drops further; a post-filter LC stage ahead of the LDO input may be needed. Maximum dropout voltage is 0.54 V at the full 150 mA load. With a 5.5 V max input, the headroom is generous for a 3.3 V output — the part runs cool even at full current as long as the input is not pushed to the ceiling.

Protection set and quiescent draw

The protection block includes over-current, over-temperature, reverse polarity, short-circuit, and under-voltage lockout (UVLO). The reverse polarity protection is notable for a small LDO — it saves an external Schottky on the input if the supply is ever wired backwards, though the reverse current path still depends on the input source impedance. UVLO holds the output off until the input rises above the threshold, preventing the downstream load from seeing a brown-out voltage on startup. Quiescent current is 75 µA typical. This is not an ultra-low-Iq part for always-on battery applications — that range starts below 1 µA — but 75 µA is reasonable for a general-purpose LDO powering a sensor or MCU that spends most of its time in active mode. The enable pin can cut that to near zero when the rail is not needed.

Frequently asked questions

What is the PSRR of TLV71333PDQNR at 1 MHz?

PSRR is 70 dB at 100 Hz and rolls off to 55 dB at 1 MHz. The 55 dB figure at 1 MHz is the relevant attenuation for switching-regulator ripple in that frequency band.

What protection features does TLV71333PDQNR include?

Over-current, over-temperature, reverse polarity, short-circuit, and under-voltage lockout (UVLO) are all integrated.