Active production — BOM-fit for new designs
The TLV5637ID: ROHS3 compliant with no exemption sunset to track.
10-bit dual DAC with 5.5 µs settling
Two 10-bit voltage-output DACs in one 8-SOIC package. The String DAC architecture delivers inherent monotonicity — the output always moves in the commanded direction, which matters for open-loop trim pots and closed-loop servo setpoints where a non-monotonic glitch would reverse the control effort. Settling time is 5.5 µs typical to within 1/2 LSB of the final value. For a 10-bit DAC clocked at the max SPI rate, this means the analog output tracks the digital command within a few microseconds — fast enough for audio-level control, motor-current setpoints on a fieldbus cycle, or real-time calibration updates on a production line. INL is ±0.4 LSB, DNL ±0.1 LSB. The DNL figure guarantees no missing codes across the full 1024-step range — every digital code produces a unique analog output level, which is the spec that matters for precision voltage references and sensor bias circuits.
Single-supply operation, industrial temperature grade
No split-plane regulation needed on the board. The reference can be internal or external; using the internal reference saves a reference IC and its bypass caps. This covers factory-floor enclosures, outdoor telecom cabinets with passive cooling, and engine-bay-adjacent electronics that see 70°C soak. The 8-SOIC package is a standard footprint; no special layout rules beyond a 0.1 µF decoupling cap at each supply pin.