10 µs settling buys you a 100 kSPS update rate per channel
The TLV5618AQDRG4 is a dual 12-bit voltage-output DAC from TI's TLV5618 family, built on a String DAC architecture. Each of the two converters settles to ±0.5 LSB in 10 µs. The SPI data interface keeps the pin count low on the 8-SOIC package — three wires (SCLK, DIN, CS) plus the external reference input.
INL is ±2 LSB max, DNL is ±0.5 LSB max — the DNL spec guarantees monotonicity across temperature, which matters when the DAC is driving a closed-loop setpoint where a non-monotonic step would reverse the control direction.
TI lists the TLV5618AQDRG4 as Active product status. That means no last-time-buy notice pending, no end-of-life risk for a design starting today. The 0.154-inch body width is a standard SOIC footprint — no exotic land pattern, no tombstoning risk on a standard reflow profile.