Dual 12-bit DAC with buffered output and SPI
The TLV5618AQDG4: It uses a string DAC architecture, which provides inherent monotonicity and low glitch energy — important for control loops that cannot tolerate non-monotonic behavior. The two DACs share a common external reference, letting you set the full-scale output independently of the supply rails. Settling time is 10 µs to within 0.5 LSB. INL is ±2 LSB maximum, DNL is ±0.5 LSB.
The tube shipment is typical for prototype and low-volume builds; reels are available under the base product number TLV5618 for production quantities.