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Texas Instruments TLV5608IDW — Discrete Semiconductors

TI TLV5608IDW 10-Bit 8-Ch DAC, 7µs, SOIC-20

MPNTLV5608IDW
End of Life

Texas Instruments TLV5608IDW, 10-bit octal voltage-output DAC, String DAC architecture, 7µs settling, SPI interface, SOIC-20 wide body, tube.

$16.13Ref. price · indicative, final on quote
Packaging20-SOIC (0.295", 7.50mm Width)
RoHSROHS3 Compliant
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

TLV5608IDW specifications
ParameterValue
Output typeVoltage - Buffered
MountingSurface Mount
Reference typeExternal
Voltage - supply, analog2.7V ~ 3.3V, 5V
Voltage - supply, digital2.7V ~ 3.3V, 5V
InterfaceSPI
Operating temperature-40°C ~ 85°C
PackageTube
ArchitectureString DAC
INL (DNL)±0.5, ±0.1
Settling time7µs
Number of bits10
Case20-SOIC (0.295\", 7.50mm Width)
Differential outputNo
Number of d (A converters)8

Product details

Active production — eight channels in one SOIC

The TLV5608IDW is an active-production octal 10-bit DAC from Texas Instruments, packing eight voltage-buffered outputs into a single 20-pin SOIC wide-body package. The 7 µs settling time to ±0.5 LSB means a full-scale step on any channel settles within one SPI frame at typical clock rates — no wait states between writes.

String DAC architecture and linearity budget

The String DAC architecture uses a resistor-divider chain for monotonicity — no glitch energy from an R-2R ladder. The ±0.5 LSB INL and ±0.1 LSB DNL guarantee no missing codes across the full 10-bit range. An external reference (REF IN) sets the full-scale voltage; the output buffer swings rail-to-rail within the supply headroom, so the reference must stay below the analog supply minus the buffer dropout. Differential output is not available — each of the eight channels is single-ended, buffered, and capable of sinking or sourcing 2 mA typical into a 10 kΩ || 100 pF load.

SPI interface and board integration

The SPI data interface (SDIN, SCLK, CS, LDAC) daisy-chains multiple TLV5608 devices on a single bus — the 10-bit word per channel serialises eight words in 80 clocks per update cycle. The 20-SOIC wide-body footprint (7.50 mm body width) matches standard SOIC-20W land patterns. Surface-mount assembly with a 1.27 mm pitch — no fine-pitch reflow challenges.

ROHS3 compliant — no exemption for lead in solder; the part ships in tube packaging (50 units per tube typical).

Frequently asked questions

What package does TLV5608IDW come in?

The TLV5608IDW is supplied in a 20-pin SOIC wide-body package (7.50 mm body width), shipped in tubes.

What is the output type of TLV5608IDW?

The TLV5608IDW provides voltage-buffered outputs — each of the eight DAC channels drives a rail-to-rail buffer with single-ended output.