Active 10-bit DAC with SPI — 20 µs settling in a compact 8-VSSOP
The TLV5606IDGKRG4: Data moves over a standard SPI interface at the clock rate the host provides — no parallel bus, no extra GPIO. The reference is external, so the output full-scale voltage tracks whatever reference rail you supply, not a fixed bandgap inside the package.
Supply flexibility and industrial temperature range
INL is ±0.5 LSB max, DNL ±0.2 LSB max — monotonicity is guaranteed over the full temperature range. For a 10-bit DAC at a 3.3 V reference, ±0.5 LSB INL corresponds to roughly ±1.6 mV endpoint error, which is tight enough for a voltage-trimming or set-point generation role.
The TLV5606IDGKRG4 comes in an 8-pin VSSOP (also described as 8-TSSOP / 8-MSOP with 0.118-inch, 3.00 mm width). The supplier device package is 8-VSSOP — same footprint, different thermal pad geometry than the standard MSOP-8, so verify the land pattern against the TI package drawing before committing the board. The part ships in bulk tube — no tape-and-reel, no carrier. For pick-and-place, the tubes feed into a vibratory bowl or tube feeder; if your line runs only reel-fed, factor in a tube-to-reel transfer or order the tape-and-reel variant of the same die.