Dual 8-bit DAC with 100 ns settling — what the speed buys you
The TLC7528EDW packs two 8-bit multiplying DACs in a single 20-SOIC, each settling to ±0.5 LSB in 100 ns. That settling time puts the update rate around 10 MHz for small-signal steps — fast enough for arbitrary waveform generation in the audio band or for closing a digital control loop on a motor drive or power supply without the DAC becoming the latency bottleneck. The R-2R architecture with current-unbuffered output means the DAC's output is a code-dependent current sink. An external op-amp converts this to a voltage, and the gain is set by the feedback resistor — or you can use the DAC in its multiplying mode by driving the reference pin with an AC signal. The output impedance varies with code, so the op-amp's input bias current and the load resistor value need to be chosen to keep the voltage error below 0.5 LSB at the worst-case code.
Supply rails and temperature range — one-rail simplicity
Both the analog and digital supplies share a single 5 V to 15 V rail. No separate AVDD and DVDD sequencing is needed — a single 5 V or 12 V supply powers the whole part. The external reference input accepts a voltage between ground and VDD. Because the output is current-unbuffered, the reference input impedance is code-dependent — the reference source must be able to drive the varying load without droop, especially at the higher codes where the DAC's input resistance drops to its minimum value of roughly 5 kΩ.
Package and board integration — 20-SOIC wide-body
The TLC7528EDW comes in a 20-SOIC wide-body package with a 7.50 mm body width. This is the wider SOIC-20 footprint, not the narrow 3.90 mm version — the land pattern matches many 20-pin audio codecs and precision op-amps. The part is supplied in tubes, which is the standard shipping format for SOIC in through-hole assembly lines.