Quad JFET op-amp for signal conditioning and audio paths
The JFET input stage holds input bias current to 30 pA typical, which preserves signal accuracy in high-impedance sensor interfaces, sample-and-hold stages, and precision integrators.
Total quiescent current for all four amplifiers is 1.4 mA (350 µA per channel), which keeps the thermal rise low in the 14-DIP package even when all channels are active.
Through-hole package for bench and retrofit work
The 14-DIP (0.300-inch row spacing) with PDIP supplier package designation is a breadboard-friendly, socketable form factor. It suits prototyping, rework, and legacy board repair where surface-mount conversion is not an option.
No stock-holding claim is made.