JFET input stage — the parametric differentiator
Its JFET input stage delivers a typical input bias current of 65 pA, several orders of magnitude lower than a bipolar-input quad like the LM324. This makes it the natural choice for high-impedance signal conditioning — photodiode transimpedance stages, piezoelectric sensor buffers, or precision integrators where bias current error would dominate the offset budget. Gain-bandwidth product is 3 MHz with a slew rate of 13 V/µs, enough for audio-band active filters and moderate-speed data acquisition front-ends. The four amplifiers share a common supply drawing 1.4 mA total, so per-amplifier dissipation sits around 350 µA — relevant for multi-channel designs where a single SOIC-14 replaces four single op-amps without a thermal penalty.
Supply range and output swing — what fits the rails
Supply span runs from 10 V minimum to 30 V maximum, so it operates on ±5 V to ±15 V split supplies or a single 10 V to 30 V rail.
Temperature grade — indoor and commercial only
Not specified for automotive or industrial extended-temperature environments.