J-FET input stage and 3 MHz GBW — what this dual op-amp delivers
The J-FET input stage gives it a typical input bias current of 65 pA, which keeps the DC error low when the source impedance is high — a common requirement in analog signal conditioning, audio preamplifiers, and active filter stages. Gain-bandwidth product is 3 MHz with a 13 V/µs slew rate. That slew rate supports clean large-signal response up to several hundred kilohertz, so the part handles audio-band signals without slew-induced distortion. The 1.4 mA total supply current for both amplifiers makes it a reasonable fit for multi-channel boards where the power budget is tight.
Operates from a 10 V to 30 V total supply span.
8-SOIC footprint and sourcing posture
Packaged in an 8-SOIC (3.90 mm width), the TL072BCDR uses the standard dual-op-amp footprint shared by countless pin-compatible parts.