Signal-chain role — DisplayPort redriver at DP v1.2
The SN75DP130DSRGZR is a DisplayPort redriver — a signal-conditioning IC that compensates for channel loss in the PCB trace and cable between a source (GPU, SoC) and a sink (monitor, panel). It complies with DP v1.1a and DP v1.2 standards, meaning it supports the full 5.4 Gbps per lane data rate of the High Bit Rate 2 (HBR2) link. The control interface is I²C, which allows the source to program the equalizer gain and output swing levels per lane. This is the key design-in differentiator: a fixed-gain repeater cannot adapt to varying cable lengths or PCB losses; the SN75DP130DSRGZR can be tuned in-system during the link-training sequence. The 48-VFQFN Exposed Pad package (7x7 mm) provides a thermal pad under the IC that must be soldered to a PCB copper plane for heat sinking — the exposed pad is the primary thermal path, not the package body.
Active lifecycle — no last-time-buy pressure
Sourcing is through authorized distribution channels; availability and pricing are confirmed per RFQ.