Dual 8-bit register with 160 MHz edge rate
The SN74LVTH16374DL is a dual 8-bit D-type flip-flop from Texas Instruments' 74LVTH family, packaged in a 48-lead SSOP (0.295" body width). It clocks at 160 MHz on a positive edge, making it a straightforward choice for buffered data pipelines and address latching in 3.3 V systems.
Output drive and timing margins
Output drive is specified at 32 mA source and 64 mA sink — the asymmetric ratio is typical of BiCMOS output stages, giving you the headroom to drive a 50 Ω backplane or a bank of LED indicators without external buffers. That 4.5 ns window sets the setup-and-hold budget for the downstream latch; at 160 MHz the clock period is 6.25 ns, so the delay consumes about 72% of the cycle, leaving roughly 1.75 ns for the rest of the path — tight enough that you'll want to check the timing closure if this sits in a critical data path. Quiescent current is 190 µA — the BiCMOS input stage draws very little when the clock is gated, so the part idles efficiently in a power-managed system.
48-SSOP footprint and temperature grade
The 48-BSSOP package (7.50 mm body width, 0.295" pitch) is a common SSOP footprint. The supplier device package is 48-SSOP — same mechanical outline, so the land pattern is standard. If the board lives in a vented enclosure or an outdoor cabinet that stays below 85°C ambient, this covers it. The 3 pF input capacitance per pin keeps the clock-line loading manageable when fanning out to multiple registers.