Quad buffer with 3-state bus control
The SN74LVTH126NSR is a 74LVTH-series quad non-inverting buffer with independent 3-state outputs, each channel gated by its own output-enable pin. Each of the four buffers sinks 64 mA and sources 32 mA — enough headroom to drive a lightly loaded backplane or a bank of LED indicators without external line drivers. The 3-state outputs let multiple buffers share a common data line; the enable pin on each channel decides which one talks and which ones listen.
Package and rework reality
Housed in a 14-SOIC (0.209", 5.30 mm body width) with a 1.27 mm pitch, this package reflows cleanly with a standard hot-air profile. The wide pin spacing makes visual inspection and hand rework straightforward — the part lifts without pad damage if the board is preheated to 100°C. Pin 1 is clearly marked by a chamfer on the package body, so orientation is unambiguous under a loupe. At the cold end, the 2.7 V minimum supply ensures the buffer still switches reliably when the 3.3 V rail droops under load.
The 74LVTH series is a BiCMOS logic family that combines the speed of ABT with the low static power of CMOS. This buffer is a drop-in for legacy 74LVT or 74ABT sockets where the supply is 3.3 V, though the input thresholds are 5 V tolerant — a detail worth confirming against the driving device's output levels.