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Texas Instruments SN74LVCH16652ADGG — Logic ICs
Texas Instruments

SN74LVCH16652ADGG 74LVCH 16-bit Bus Transceiver, 1.65V–3.6V

MPNSN74LVCH16652ADGG
End of Life

Texas Instruments 74LVCH series, SN74LVCH16652ADGG, Logic Type Transceiver, Non-Inverting, Output Type 3-State, 2 Element, 8 Bit per Element, 1.65V ~ 3.6V Supply, Surface Mount, 56-TFSOP (0.240", 6.10mm Width), -40°C ~ 125°C (TA).

$1.2Ref. price · indicative, final on quote
SN74LVCH16652ADGG datasheet
Packaging56-TFSOP (0.240", 6.10mm Width)
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
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Specifications

SN74LVCH16652ADGG Technical Specifications
ParameterValue
Series74LVCH
Logic typeTransceiver, Non-Inverting
Output type3-State
Mounting typeSurface Mount
Voltage1.65V ~ 3.6V
Current - output high, low24mA, 24mA
Operating temperature-40°C ~ 125°C (TA)
PackageBulk
Case56-TFSOP (0.240\", 6.10mm Width)
Number of elements2
Number of bits per element8

Product details

16-bit registered bus transceiver for mixed-voltage backplanes

It operates across a supply range of 1.65V to 3.6V, making it compatible with 1.8V, 2.5V, and 3.3V logic domains without level shifters.

The 1.65V to 3.6V supply window is the headline feature for a BOM engineer: this part bridges 1.8V-core FPGAs or low-voltage ASICs to 3.3V peripherals without an external translator. The 24 mA output drive is typical for the 74LVCH family; it handles fan-out to eight or ten standard CMOS loads without buffering.

ROHS3 compliant, so it passes European and California regulatory requirements without exemption paperwork.

Frequently asked questions

Is SN74LVCH16652ADGG compatible with 1.8V logic?

Yes. The supply range of 1.65V to 3.6V includes 1.8V operation. At 1.8V the input thresholds scale proportionally, and the 24 mA output drive holds within the family's typical curve — no level translator needed when interfacing a 1.8V FPGA to a 3.3V backplane.

What is the difference between SN74LVCH16652ADGG and SN74LVC16652ADGG?

The LVC variant (SN74LVC16652ADGG) is a functionally identical 16-bit registered transceiver but lacks the bus-hold feature that the LVCH family includes. Bus hold eliminates the need for external pull-up or pull-down resistors on unused inputs, saving board space. If your design already has pull resistors, the LVC version is a drop-in alternative; if not, the LVCH version reduces component count.