10-bit bus hold in a 24-SOIC
The SN74LVC827ADWR is a 10-bit buffer with non-inverting logic and 3-state outputs, running off a 1.65V to 3.6V supply rail. It sinks or sources 24 mA per channel, which is enough to drive a handful of LED indicators or a short ribbon cable without a secondary buffer. The 24-SOIC wide-body package (7.50 mm width) is a common footprint for bus-interface logic. The 0.295-inch body width matches standard SOIC-24 land patterns, so it reworks cleanly under hot air if you keep the nozzle temperature around 300°C and preheat the board to 100°C to avoid lifting the narrow pads. The 1.65V minimum supply lets it interface directly with 1.8V-core FPGAs or MCUs without a level translator on the bus.