8-bit transceiver for mixed-voltage buses
Supply voltage and bus compatibility
The 1.65V to 3.6V supply range means this part can sit on a 3.3V backplane and still talk to a 1.8V FPGA bank without a dedicated translator — the transceiver's inputs and outputs track the supply rail. At 3.3V the 24 mA drive gives clean edges on short stubs; at 1.8V the drive current is lower but still adequate for point-to-point links under a few inches. If your bus has more than a handful of loads, budget a derating check at the lower supply corner.
Housed in a 24-TSSOP package with a 4.40mm body width (0.173"), it fits a standard 0.65mm-pitch TSSOP-24 footprint. The 3-state outputs let you share the bus with other transceivers or a microcontroller without contention; the output-enable control (not detailed here) is typically active-low per the 74LVC convention.
For new designs, there is no LTB risk; the part is available through the standard TI distribution channel and independent supply.