1.5 ns propagation delay — 8-bit bus hold
The SN74LVC373ADWR is an 8-bit D-type transparent latch from TI's 74LVC series, with tri-state outputs and a propagation delay of 1.5 ns. That 1.5 ns sets the data-to-output settling time — for a bus clocked at 66 MHz, the latch clears before the next rising edge, so it won't hold up the address or data path. Outputs source and sink 24 mA each — enough to drive a 50 pF bus load at 3.3 V without external buffers on short traces. The 20-SOIC package (7.50 mm body width) is a common footprint — rework-friendly with a standard soldering iron and a hot-air station for removal.
Cut Tape works for prototype or low-volume builds. Both are standard 20-SOIC, so no special feeder or nozzle change on the line.