Dual XOR gate for mixed-voltage logic paths
The SN74LVC2G86DCUR is a dual 2-input XOR (Exclusive OR) gate from the 74LVC series, packing two independent XOR functions into an 8-VSSOP package.
3.6 ns propagation delay at 5 V
Maximum propagation delay is 3.6 ns at 5 V with a 50 pF load — this sets the timing budget for the data path. At lower supply voltages the delay increases; the 1.65 V minimum supply still delivers a propagation delay that keeps most 10–20 MHz clocked buses within margin. Output drive capability is 32 mA source and 32 mA sink at 3.3 V, enough to drive a standard CMOS load or a short trace without a buffer. The quiescent current maxes at 10 µA, so the gate adds negligible standby draw in battery-powered systems.
The 74LVC family is characterized across this range, so logic thresholds and timing are guaranteed at the temperature extremes. Input logic levels are specified as 0.7 V–0.8 V low and 1.7 V–2.0 V high across the supply range, ensuring reliable switching with 1.8 V logic at the low end and 3.3 V logic at the high end without additional threshold shifting.