SN74LVC244AN

Texas Instruments · 74LVC Series

Texas Instruments 74LVC series buffer, non-inverting, 3-state outputs, 20-DIP (0.300", 7.62mm) through-hole package, 1.65V-3.6V supply, 24mA output drive, -40°C to +125°C, ROHS3 compliant.

Texas Instruments SN74LVC244AN
Download datasheet (PDF)
[IN STOCK] In Stock: 38 pcs
$1.99/ pc

Volume pricing

Buy Now

MOQ 1 · Tube · RoHS · EIA-481 · DAP/DDP · T/T

Technical specifications

SN74LVC244AN specifications
Parameter / AttributeSpecification / Value
Series74LVC
Logic typeBuffer, Non-Inverting
Output type3-State
MountingThrough Hole
Supply voltage1.65V ~ 3.6V
Current - output high, low24mA, 24mA
Operating temperature-40°C ~ 125°C (TA)
PackageTube
Case20-DIP (0.300\", 7.62mm)
Number of elements2
Number of bits per element4

Technical details

Active production — BOM-fit for 3.3V and 1.8V logic domains

The SN74LVC244AN: Symmetrical 24 mA source and sink drive (Current - Output High, Low: 24 mA, 24 mA) gives it enough fan-out to drive up to ten 74LVC inputs per output at 3.3 V, or drive a LED indicator directly through a series resistor without a transistor stage.

20-DIP through-hole — legacy board and prototyping fit

The 0.100-inch pin pitch is compatible with standard breadboards and wire-wrap sockets. Supplier device package is 20-PDIP — the same body as the generic 20-DIP but with TI's specific mold compound and leadframe. For a legacy design that already has a 20-pin DIP footprint, this drops in without a layout change.

Operating temperature range -40°C to 125°C (TA) qualifies this buffer for environments where the ambient inside the enclosure reaches 85°C or higher — industrial motor drives, outdoor telecom cabinets, and under-hood automotive modules that see engine-bay heat soak. For a non-safety-critical automotive module, the temperature margin alone may be sufficient; for safety-critical or PPAP-required lines, request the AEC-grade variant.

3-state bus architecture — shared data lines without contention

The 3-state output type lets the buffer disconnect its outputs from the bus when the output-enable pin is inactive. This is the standard architecture for shared data buses (address/data lines in a microprocessor system, or a parallel sensor bus) where multiple devices drive the same traces. Non-inverting logic type (Buffer, Non-Inverting) means the output polarity matches the input — no inversion to account for in the signal path. Two elements of four bits each (Number of Elements: 2, Number of Bits per Element: 4) gives eight total channels, which maps directly to an 8-bit data bus or two 4-bit nibble buses.

Sourcing posture — active, quoted to order

ROHS3 compliant — no exemption issues for EU RoHS or California Proposition 65. The compliance documentation (RoHS certificate of compliance, REACH declaration) is available from Texas Instruments' compliance portal.

SN74LVC244AN
[ALLOC] verified
Quote