A fast unbuffered inverter for timing-critical paths
Its key differentiator is the 3.5 ns propagation delay at 5 V with a 50 pF load — that's fast enough to clean up a clock signal or invert a timing pulse without adding noticeable skew. The unbuffered topology means the output transitions follow the input waveform more linearly than a Schmitt-trigger or buffered gate, which matters when you're using it as a crystal oscillator amplifier or a linear gain stage.
Output drive and quiescent current
Each output can sink or source 32 mA, which is generous for a single-gate device. You can drive a small LED or a logic input directly without a buffer. The quiescent current maxes out at 10 µA, so it won't eat into your standby budget in battery-powered designs.
Housed in a 6-UFDFN package (TI calls it 6-SON, 1.45 mm x 1 mm), this is a tiny surface-mount device. The supplier device package is 6-SON (1.45x1).