Single unbuffered inverter for mixed-voltage logic
Its unbuffered output stage gives a cleaner, more linear transfer characteristic than a buffered inverter, which matters in oscillator or crystal-driver circuits where the extra gain of a buffered gate can cause instability.
This temperature grade is the same as the wider 74LVC family's industrial-range parts, so it shares the same silicon reliability profile.
Propagation delay and output drive
Maximum propagation delay is 3.5 ns at 5V with a 50 pF load, which keeps the signal-integrity budget intact for clock distribution or control-signal fan-out up to about 50 MHz. The 32 mA symmetric output drive (both source and sink) is unusually high for a single-gate logic part — it can directly drive a low-current LED or a small MOSFET gate without a buffer, saving a component. Quiescent current maxes at 10 µA, so the part adds negligible standby draw in battery-powered designs.
The exposed pad is not electrically connected internally but should be tied to the ground plane for mechanical stability and thermal relief. The 4-XFDFN exposed-pad package option listed in the package/case field is a related footprint variant; the supplier device package is 5-X2SON (0.8x0.8 mm).
It is not nearing end-of-life, and no last-time-buy notice has been issued. The 74LVC family is a mature, widely second-sourced logic platform, so supply risk is low even during allocation periods.
