Propagation delay and output drive
Maximum propagation delay is 4.5 ns at 5 V with a 50 pF load, which keeps signal skew tight in a clock distribution or control signal path. The output can source or sink 32 mA per pin, enough to drive a low-power LED or a short trace to another logic input without a buffer.
Supply voltage and logic thresholds
The low-level threshold is 0.7 V to 0.8 V, and the high-level threshold is 1.7 V to 2 V, which is compatible with standard CMOS and TTL inputs across the supply range.
Quiescent current and package
Quiescent current is a maximum of 10 µA, so this gate adds negligible draw to a battery-powered rail. The SC-70-5 footprint is compact—about 2.0 mm × 1.25 mm—and shares the same land pattern as SOT-353, making it a drop-in replacement for other single-gate logic in that outline.