Single-gate inverter in the 74LVC family
It performs the basic NOT logic function on one input, with a single output. The device operates across a wide supply range of 1.65V to 5.5V, making it compatible with 1.8V, 2.5V, 3.3V, and 5V logic levels.
The maximum propagation delay is 3.7 ns at 5V with a 50 pF load. This figure sets the timing budget for signal paths: in a 50 MHz clock domain, 3.7 ns represents about 18% of a 20 ns period, leaving headroom for routing delays and other gates. At lower supply voltages the delay increases — the datasheet curves show typical values near 5 ns at 3.3V and 8 ns at 1.8V, so factor that into your worst-case timing analysis.
32 mA output drive — direct drive for LEDs or logic inputs
The 32 mA rating is symmetrical for both high and low states, simplifying current budgeting on the rail.
It is ROHS3 compliant.