Hex inverter with open-drain outputs for mixed-voltage buses
The Texas Instruments SN74LVC06ADR packs six independent inverter gates, each with an open-drain output that sinks up to 24 mA. The 3.5 ns max propagation delay at 3.3 V and 50 pF load keeps the gate transparent in clock and control paths up to the mid-double-digit MHz range.
14-SOIC board fit and quiescent power
The surface-mount package is compatible with reflow profiles typical for lead-free assemblies. Quiescent current maxes at 1 µA, so the six inverters collectively draw negligible standby power — a fit for battery-backed sections of a design where the logic stays powered while the rest of the board sleeps.