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Texas Instruments SN74LV32AD — Logic ICs

SN74LV32AD TI 74LV Quad OR Gate, 2V-5.5V, 7.5ns, 14-SOIC

MPNSN74LV32AD
End of Life

Texas Instruments SN74LV32AD, 74LV series, quad 2-input OR gate, 2V to 5.5V supply, 7.5ns propagation delay at 5V/50pF, 12mA output drive, -40°C to 125°C, 14-SOIC package, Tube.

$1.22Ref. price · indicative, final on quote
Packaging14-SOIC (0.154", 3.90mm Width)
RoHSROHS3 Compliant
Series74LV
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

SN74LV32AD specifications
ParameterValue
Series74LV
Logic typeOR Gate
MountingSurface Mount
Supply voltage2V ~ 5.5V
Current - quiescent20 µA
Current - output high, low12mA, 12mA
I/O channels2
Operating temperature-40°C ~ 125°C
PackageTube
Case14-SOIC (0.154\", 3.90mm Width)
Number of circuits4
Input logic level - low0.5V
Input logic level - high1.5V
Max propagation delay @ v, max CL7.5ns @ 5V, 50pF

Product details

The SN74LV32AD is a quad 2-input OR gate from the 74LV series. It integrates four independent OR gates, each with two inputs, in a 14-SOIC package. The 74LV series operates from 2V to 5.5V supply. Typical applications include signal gating and combinatorial logic in industrial control boards.

This is a standard-current-production part, not a phase-out or NRND item — the BOM line can be committed without an obsolescence watch.

Frequently asked questions

What is the propagation delay of SN74LV32AD at 5V?

Maximum propagation delay is 7.5ns at 5V supply with a 50pF load. This is the worst-case over temperature and voltage — typical delay at 25°C is lower.

What are the equivalent or replacement parts for SN74LV32AD?

Within the 74LV family, the SN74LV00APWR (quad NAND) and SN74LV08ADR (quad AND) share the same supply range, package footprint, and output drive but implement different logic functions — they are not OR-gate replacements. For a direct OR-gate substitute, any 74LV32 quad OR gate in 14-SOIC from a major vendor is functionally equivalent; verify pinout and timing.