Triple 3-input AND gate for mixed-voltage glue logic
The Texas Instruments SN74LV11AD is a triple 3-input AND gate from the 74LV low-voltage CMOS family. It packs three independent AND gates, each with three inputs, into a single 14-SOIC package. The supply range spans 2V to 5.5V, with input logic thresholds at 0.5V (low) and 1.5V (high), making it a natural fit for boards that mix 3.3V and 5V logic domains — no level shifter needed between a 3.3V MCU and a 5V peripheral bus.
7.9 ns propagation delay — timing budget for 50–100 MHz buses
Maximum propagation delay is 7.9 ns at 5V with a 50 pF load. That is fast enough for address decoding or clock gating in systems running up to roughly 50–100 MHz, where the gate delay eats a small fraction of the cycle. At 3.3V the delay stretches a bit (typical datasheet curve), so budget an extra nanosecond or two if the rail is on the low side.
Industrial temperature range and quiescent current
Quiescent current maxes at 20 µA across the full temperature range — negligible for battery-backed or always-on domains. Output drive is 12 mA sink and source, enough for a few CMOS loads or a short trace.
This is a standard-production part you can qualify into a new BOM or sustain on an existing one without worrying about a forced redesign next year.